Plenary Talks

Prof. David Atienza

Smarter Electronic Systems to Rescue the Internet of Things

EPFL, Switzerland

The Internet of Things (IoT) has been hailed as the next frontier of innovation in which our everyday objects are connected in ways that improve our lives and transform industries. The IoT concept is poised to reach more than 20 billion connected devices by 2025, but major key challenges remain in achieving this potential due to inherent resource-constrained nature of IoT systems, coupled with the computing power and data gathering requirements of Big Data applications, which can result in degraded and unreliable behavior of IoT nodes, or a global energy crisis when IoT is fully deployed in the future. In this keynote, Prof. Atienza will first discuss the challenges of ultra-low power (ULP) design and communication in IoT nodes for Big Data analytics. Then, the opportunities for edge computing in next-generation smart IoT nodes will be highlighted as a scalable way to fully deliver the IoT concept. This new trend of smarter electronics architectures will need to combine new ULP multi-core embedded systems with neural network accelerators, as well as including energy-scalable software layers, to gracefully adapt the energy consumption and precision of the IoT application outputs according to the requirements of our surrounding world and available energy at each moment in time, as living organisms do to operate efficiently in the real world.

David Atienza

David Atienza is Associate Professor of Electrical and Computer Engineering and leads the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in Computer Science and Engineering from UCM (Spain) and IMEC (Belgium). His research interests focus on system-level design methodologies for energy-efficient multi-processor system-on-chip architectures (MPSoC) and next-generation smart embedded systems (particularly wearables) for the Internet of Things (IoT) era. In these fields, he is co-author of more than 250 publications, seven patents, and received several best paper awards in top conferences. He also was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. Dr. Atienza has received the DAC Under-40 Innovators Award in 2018, IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He is an IEEE Fellow and an ACM Distinguished Member.