As usual in SMACD Conferences, the 2019 edition will also hold a collection of Special Sessions on relevant and emerging topics.
Today’s integrated circuits industry is characterized by complex systems-on-a-chip architectures where digital signal processing, analog interfaces, and memory blocks are integrated together on the same die. However, unlike digital circuits where the low-level phases of the design process are automated using established methodologies, the layout of analog and radio-frequency circuits is mostly drawn manually using computer-aided design frameworks. Although its automation has been intensively studied in the last three decades, still, there is no established automation flow in the industrial environment, resulting in a time-consuming and difficult-to-reuse design methodology.
Moreover, as analog and radio-frequency integrated circuit design moves to deeper nanometer technology nodes, the ever-increasing number of design rules and topological constraints further hamper the maturing of these tools. The aim of this Special Session is to bring together new research contributions dealing with analog and radio-frequency layout synthesis, spanning from the device methodologies up to the system level.
There are two buzzwords around IC world these days: Machine Learning (ML) and Deep Learning (DL). The truth beyond all the fuss is that, for example, machine / deep learning algorithms are already aiding anomaly detection on assembly lines in the industry. Moreover, in the last years, EDA vendors have improved their ML know-how, and, ML research projects are emerging. Once established, they promise to reduce design costs while improving quality and reusability dramatically. When that happens we’ll reach the Golden Age of machine learning in EDA, of course, digital EDA… How about analog and mixed-signal EDA?
Recent works show Deep Neural Networks that can not only replace computationally demanding simulations (EM Simulation, Circuit Simulation or Parasitic Estimation) but also to address other aspects of Analog IC design, such as topology discovery, device sizing, device placement, or, circuit partitioning. This Special Session aims to bring together original research that advances analog and mixed-signal EDA using machine learning methods.
MEMS have been one of the most important technologies on the 21st century, and, have revolutionized both industrial and consumer products by combining silicon-based microelectronics with micromachining technology. Its techniques and microsystem-based devices are affecting of all of our lives and the way we live, every day. Over the past decade, MEMS researchers and developers have demonstrated an extremely large number of microsensors for almost every possible sensing modality including temperature, pressure, inertial forces, chemical species, magnetic fields or radiation. Remarkably, many of these micromachined sensors have actually demonstrated performances exceeding those of their macroscale counterparts. What will be the future? Will the MEMS design law “one design – one technology” still be true or will the design be similar to schematic-driven ASIC design using PDKs and libraries? Will we design MEMS independently of the technology development by fabless design houses?
MEMS and Heterogeneous Systems design is more important than ever, and, this special session aims at presenting the most recent advances in CAD tools to support MEMS and Heterogeneous Systems design and optimization.
There is a growing analog content in today’s ICs in light of increasing IoT, automotive, and wireless communication applications. Testing analog, mixed analog-digital, and RF ICs to meet quality and reliability requirements imposed by the application has become a challenging task. The traditional approach in industry is to measure directly the performances and compare them to their specifications promised in the datasheet. In many cases, this straightforward and easily interpretable approach is not economically affordable, it does not deliver the low DPPM demanded by safety-critical applications, and it may not even be applicable in the context of SoCs.
This special session targets bringing together new contributions on cutting edge test approaches for analog, mixed-signal, and RF ICs.